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Computing Units/Configurable_Adders adder_config_nonzero_Trunc

Description:

Adders with an extra port to switch between approx. and exact modes

Implementations:

There are: 2 implementations for this unit

adder_config_nonzero_Trunc

Version: v1

Reference paper:

  • Ardalan Najafi, Moritz Weissbrich, Guillermo Paya Vaya and Alberto Garcia-Ortiz Coherent Design of Hybrid Approximate Adders: Unified Design Framework and Metrics IEEE Journal on Emerging and Selected Topics in Circuits and Systems PDF Bibtex

                
    @ARTICLE{8354693, 
    author={A. {Najafi} and M. {Weissbrich} and G. {Paya-Vaya} and A. {Garcia-Ortiz}}, 
    journal={IEEE Journal on Emerging and Selected Topics in Circuits and Systems}, 
    title={Coherent Design of Hybrid Approximate Adders: Unified Design Framework and Metrics}, 
    year={2018}, 
    volume={8}, 
    number={4}, 
    pages={736-745}, 
    keywords={adders;approximation theory;coherent design;hybrid approximate adders;unified design framework;technology scaling;nonsystematic methodology;robust error metrics;approximate accelerator;ad-hoc methodology;Adders;Error analysis;Systematics;Computer vision;Usability;Approximate adders;error metrics;computer vision;generic template;automatic design framework}, 
    doi={10.1109/JETCAS.2018.2833284}, 
    ISSN={2156-3357}, 
    month={Dec},}
                

  • Fabio Frustaci , Stefania Perri , Pasquale Corsonello , Massimo Alioto Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation IEEE Transactions on Very Large Scale Integration (VLSI) Systems PDF Bibtex

                
    @ARTICLE{8561219, 
    author={F. {Frustaci} and S. {Perri} and P. {Corsonello} and M. {Alioto}}, 
    journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, 
    title={Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation}, 
    year={2019}, 
    volume={27}, 
    number={4}, 
    pages={964-968}, 
    keywords={adders;energy consumption;power aware computing;energy reduction;ripple-carry adder;peak signal-to-noise ratio;energy-quality scalable adders;nonzeroing bit truncation;approximate addition;energy consumption;output quality;error-tolerant applications;innovative bit truncation strategy;quality degradation;truncation schemes;discrete cosine transform engine;silicon area overhead;noise figure 8.5 dB;Adders;Very large scale integration;Energy consumption;Art;Degradation;Discrete cosine transforms;Engines;Adaptive precision;approximate computing;energy-quality scaling;error-tolerant systems;low-power design;VLSI}, 
    doi={10.1109/TVLSI.2018.2881326}, 
    ISSN={1063-8210}, 
    month={April},}
                

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